1. Field of the Invention
The present invention relates to a cascode BiMOS driving circuit for driving a cascode BiMOS (bipolar metal oxide semiconductor) which is used for a switching element.
2. Description of the Background Art
FIG. 1 is a circuit diagram showing a conventional cascode BiMOS driving circuit. Referring to FIG. 1, a cascode BiMOS 1 comprises an NPN transistor Q1 and an N channel MOS field effect transistor (hereinafter referred to as MOSFET) 2. The transistor Q1 has a collector connected to a first output terminal 3, an emitter connected to the drain of the MOSFET 2 and a base coupled to a second output terminal 5 through an excessive voltage absorbing circuit 4 comprising a diode D1 and a d.c. bias voltage source V which are serially connected. The excessive voltage absorbing circuit 4 is turned on when a voltage applied across the circuit 4 exceeds a predetermined voltage. The MOSFET 2 has a drain connected to the emitter of the transistor Q1, a source connected to the second output terminal 5 and a gate connected to a first control terminal 6. A second control terminal 8 is connected to the gate of a MOSFET 7 which has a drain connected to the colletor of the transistor Q1 and a source connected to the base of the transistor Q1.
The turn on operation of the cascode BiMOS 1 is as follows: When the cascode BiMOS 1 is in an off state, the transistor Q1 and MOSFET's 2 and 7 are in an off state, and no current flows through the excessive voltage absorbing circuit 4. A voltage applied across the first and second output terminals 3 and 5 is blocked by the transistor Q1 and the MOSFET 2. Control signals are applied through the fist and second control terminals 6 and 8, to turn on the MOSFET's 2 and 7. A gate current is supplied from the fist output terminal 3 to the gate of the transistor Q1 through the MOSFET 7, so that the transistor Q1 is turned on. Thus, the cascode BiMOS 1 is turned on, and a current flows from the first output terminal 3 to the second output terminal 5 through the transistor Q1 and the MOSFET 2. In this case, a higher voltage than the predetermined voltage is not applied across the excessive voltage absorbing circuit 4. Therefore, the excessive voltage absorbing circuit 4 is not turned on, so that no current follows through the excessive voltage absorbing circuit 4.
The turn off operation of the cascode BiMOS 1 is as follows: Control signals are applied through the first and second control terminals 6 and 8, to turn off the MOSFET's 2 and 7. The current, flowing from the first output terminal 3 to the second output terminal 5 through the transistor Q1 and the MOSFET 2, is blocked by the turned off MOSFET 2, so that the drain-to-source voltage of the MOSFET 2 is increased. The base-to-emitter junction of the transistor Q1 is still in an on state, since many charges are accumulated in the transistor Q1. Therefore, a voltage across the base of the transistor Q1 and the source of the MOSFET 2 is increased. When this voltage exceeds the predetermined voltage, the excessive voltage absorbing circuit 4 is turned on. Upon this turn on of the excessive voltage absorbing circuit 4, charges accumulated in the base of the transistor Q1 is rapidly discharged through the excessive voltage absorbing circuit 4, so that the transistor Q1 is turned off. Thus, the cascode BiMOS 1 is turned off. The cascode BiMOS 1 alternates the turn on state and the turn off state by repeating the above operation.
In the cascode BiMOS driving circuit structured as hereinbefore described, the breakdown voltage of the MOSFET 7 must be about the same as that of the transistor Q1. In general, assuming that a MOSFET is the same in size as a bipolar transistor to pass the same current, the breakdown voltage of the MOSFET is lower than that of the bipolar transistor. It is known that the on-state resistance of a MOSFET becomes five to six times as large when the breakdown voltage of the MOSFET is twice increased. Therefore, it is necessary to increase channel length and width of the MOSFET 7, in order to make the breakdown voltage of the MOSFET 7 equal to that of the transistor Q1 and make current value flowing through the MOSFET 7 equal to that flowing through the transistor Q1. Thus, the MOSFET 7 occupies larger chip area than the transistor Q1. As a breakdown voltage required for the transistor Q1 is increased, a chip area for the MOSFET 7 becomes larger in comparison with a chip area for the transistor Q1. As a result, the input capacitance of the MOSFET 7 and a manufacturing cost are disadvantageously increased.
Further, the cascode BiMOS driving circuit shown in FIG. 1 needs a control circuit (not shown) for preventing a surge voltage cased at the first and second output terminals 3 and 5 by abrupt turn off of the transistor Q1. This control circuit operates to slightly delay the turn off timing of the MOSFET 7 in comparison with that of the MOSFET 2, by making applying timings of control signals to the first and second control terminals 6 and 8 different. Thus, charge and discharge of a base current of the transistor Q1 simultaneously occur through the MOSFET 7 and the excessive voltage absorbing circuit 4, so that the transistor Q1 is gently turned off.